library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity sumNetwork is
generic ( N : natural);
port (	A : in   std_logic_vector (N-1 downto 0);
		B : in   std_logic_vector (N-1 downto 0);
		C : in   std_logic_vector (N/4 - 1 downto 0);
		S : out std_logic_vector (N-1 downto 0)
 );
end sumNetwork;

architecture STRUCTURAL of sumNetwork is

component CSA
generic (N : integer);
port (	A	: in   std_logic_vector(N-1 downto 0);
		B	: in   std_logic_vector(N-1 downto 0);
		Cin	: in   std_logic;
		S	: out std_logic_vector(N-1 downto 0);
		Cout: out std_logic
);
end component;

begin

CSAi: for i in 0 to N/4 -1 generate
	CSA4 : CSA generic map (4) port
	map (	A		=> A(4*(i+1)-1 downto 4*i),
			B		=> B(4*(i+1)-1 downto 4*i),
			Cin		=> C(i),
			S		=> S(4*(i+1)-1 downto 4*i),
			Cout	=> open
		);
end generate CSAi;

end STRUCTURAL;
